| PART |
Description |
Maker |
| M27V322-100B1 M27V322-100B6 M27V322-100F1 M27V322- |
32 Mbit (2Mb ×16) low-voltage UV EPROM and OTP EPROM
32 Mbit (2Mb ?16) low-voltage UV EPROM and OTP EPROM
32 Mbit (2Mb 隆驴16) low-voltage UV EPROM and OTP EPROM
32 Mbit (2Mb 】16) low-voltage UV EPROM and OTP EPROM
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STMicroelectronics
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| M27V160-120B1 M27V160-120B6 M27V160-120F1 M27V160- |
16 Mbit (2Mb x8 or 1Mb x16) Low Voltage UV EPROM and OTP EPROM
|
STMicroelectronics
|
| M29DW324DB70ZA6 M29DW324DB70ZA6F M29DW324DB70ZE6F |
CABLE ASSEMBLY; LEAD-FREE SOLDER; N MALE TO N FEMALE; 50 OHM, RG225/U COAX, DOUBLE SHIELDED
32 Mbit 4Mb x8 or 2Mb x16, Dual Bank 16:16, Boot Block 3V Supply Flash Memory 32兆位4Mb的x8或功能的2Mb x16插槽，双66分，启动V电源快闪记忆
32 Mbit 4Mb x8 or 2Mb x16, Dual Bank 16:16, Boot Block 3V Supply Flash Memory 32兆位4Mb的x8或功能的2Mb x16插槽，双66分，启动3V电源快闪记忆
32 Mbit 4Mb x8 or 2Mb x16, Dual Bank 16:16, Boot Block 3V Supply Flash Memory 32兆位4Mb的x8或功能的2Mb x16插槽，双1616分，启动V电源快闪记忆
32 Mbit 4Mb x8 or 2Mb x16 / Dual Bank 16:16 / Boot Block 3V Supply Flash Memory
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SGS Thomson Microelectronics
意法半导
STMicroelectronics N.V.
ST Microelectronics
|
| M50LPW116N |
16 Mbit 2Mb x8, Boot Block 3V Supply Low Pin Count Flash Memory
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意法半导
|
| M36W0R5020B0 M36W0R5020B0ZAQ M36W0R5020B0ZAQE M36W |
32 Mbit (2Mb x16, Multiple Bank, Burst) Flash Memory and 4 Mbit SRAM, 1.8V Supply Multi-Chip Package
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http://
STMicroelectronics
ST Microelectronics
|
| M29DW323DB70ZA6 M29DW323DT M29DW323DT70N1E M29DW32 |
CAP 100PF 50V 20% Z5U SMD-0805 TR-7 PLATED-NI/SN
Low-Noise Precision Operational Amplifier 8-SOIC 32兆位4Mb的x8或功能的2Mb x16插槽，双4分，启动V电源快闪记忆
High-Speed, Low-Power, Precision Quad Operational Amplifier 20-LCCC -55 to 125 32兆位4Mb的x8或功能的2Mb x16插槽，双4分，启动V电源快闪记忆
32 Mbit 4Mb x8 or 2Mb x16, Dual Bank 8:24, Boot Block 3V Supply Flash Memory 32兆位4Mb的x8或功能的2Mb x16插槽，双24分，启动V电源快闪记忆
32 Mbit 4Mb x8 or 2Mb x16, Dual Bank 8:24, Boot Block 3V Supply Flash Memory 32兆位4Mb的x8或功能的2Mb x16插槽，双4分，启动V电源快闪记忆
High-Speed, Low-Power, Precision Quad Operational Amplifier 14-CDIP -55 to 125 32兆位4Mb的x8或功能的2Mb x16插槽，双4分，启动V电源快闪记忆
Excalibur High-Speed Low-Power Precision Quad Operational Amplifier 14-PDIP
32 Mbit 4Mb x8 or 2Mb x16 / Dual Bank 8:24 / Boot Block 3V Supply Flash Memory
|
STMicroelectronics N.V.
意法半导
ST Microelectronics
SGS Thomson Microelectronics
|
| M36DR432AD M36DR432AD10ZA6T M36DR432AD12ZA6T M36DR |
32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256Kb x16 SRAM, Multiple Memory Product
|
STMICROELECTRONICS[STMicroelectronics]
|
| M36DR432C M36DR432CA10ZA6T M36DR432CA85ZA6T M36DR4 |
32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product
|
ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
|
| M36DR232A M36DR232BZA M36DR232AZA |
32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 2 Mbit 128K x16 SRAM, Multiple Memory Product 32兆位Mb x16插槽，双行，页闪存和2兆位128K的x16的SRAM，多个存储产
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STMicroelectronics N.V.
http://
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| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
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Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
| M36W432-ZAT M36W432BZA M36W432T85ZA1T M36W432T85ZA |
32 Mbit 2Mb x16, Boot Block Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product
32 MBIT (2MB X16, BOOT BLOCK) FLASH MEMORY AND 4 MBIT (256K X16) SRAM, MULTIPLE MEMORY PRODUCT
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ST Microelectronics
|
